A 5Gb/s Optical Receiver Front-End in 0.18 mu m CMOS Technology | |
An Qi; Li lei; Liang yuanjun; Ke Lingzhi | |
2009 | |
会议名称 | PROCEEDINGS OF 2009 INTERNATIONAL WORKSHOP ON INFORMATION SECURITY AND APPLICATION |
英文摘要 | A 5Gb/s optical receiver front-end for optical interconnection is presented in this paper. A transimpedance amplifier (TIA), limiting amplifiers (LA), output buffer and a bias circuit are integrated in deep N-well 0.18 mu m CMOS technology. As the input current amplitude is 30 mu A, the differential output voltage is achieved to be 124 mV. The linear gain is 78.8dB Omega and consumes 200mW under 1.8V supply. Without on-chip inductor, the core size of the circuit is only 800 x 300 mu m(2) |
收录类别 | EI |
语种 | 英语 |
内容类型 | 会议论文 |
源URL | [http://ir.siat.ac.cn:8080/handle/172644/2515] ![]() |
专题 | 深圳先进技术研究院_集成所 |
作者单位 | 2009 |
推荐引用方式 GB/T 7714 | An Qi,Li lei,Liang yuanjun,et al. A 5Gb/s Optical Receiver Front-End in 0.18 mu m CMOS Technology[C]. 见:PROCEEDINGS OF 2009 INTERNATIONAL WORKSHOP ON INFORMATION SECURITY AND APPLICATION. |
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