Iterative learning control for synchronization of reticle stage and wafer stage in step-and-scan lithographic equipment
Li, Lan-Lan1,2; Hu, Song1; Zhao, Li-Xin1; Ma, Ping1
2013
会议名称Proceedings of SPIE: International Symposium on Photoelectronic Detection and Imaging 2013: Micro/Nano Optical Imaging Technologies and Applications
会议日期2013
卷号8911
页码89110X
中文摘要Lithographic equipments are highly complex machines used to manufacture integrated circuits (ICs). To make larger ICs, a larger lens is required, which, however, is prohibitively expensive. The solution to this problem is to expose a chip not in one flash but in a scanning fashion. For step-and-scan lithographic equipment (wafer scanner), the image quality is decided by many factors, in which synchronization of reticle stage and wafer stage during exposure is a key one. In this paper, the principle of reticle stage and wafer stage was analyzed through investigating the structure of scanners, firstly. While scanning, the reticle stage and wafer stage should scan simultaneously at a high speed and the speed ratio is 1:4. Secondly, an iterative learning controller (ILC) for synchronization of reticle stage and wafer stage is presented. In the controller, a master-slave structure is used, with the wafer stage acting as the master, and the reticle stage as the slave. Since the scanning process of scanner is repetitive, ILC is used to improve tracking performance. A simple design procedure is presented which allows design of the ILC system for the reticle stage and wafer stage independently. Finally, performance of the algorithm is illustrated by simulated on the virtual stages (the reticle stage and wafer stage). The results of simulation experiments and theory analyzing demonstrate that using the proposed controller better synchronization performance can be obtained for the reticle stage and wafer stage in scanner. Theory analysis and experiment shows the method is reasonable and efficient. © 2013 SPIE.
英文摘要Lithographic equipments are highly complex machines used to manufacture integrated circuits (ICs). To make larger ICs, a larger lens is required, which, however, is prohibitively expensive. The solution to this problem is to expose a chip not in one flash but in a scanning fashion. For step-and-scan lithographic equipment (wafer scanner), the image quality is decided by many factors, in which synchronization of reticle stage and wafer stage during exposure is a key one. In this paper, the principle of reticle stage and wafer stage was analyzed through investigating the structure of scanners, firstly. While scanning, the reticle stage and wafer stage should scan simultaneously at a high speed and the speed ratio is 1:4. Secondly, an iterative learning controller (ILC) for synchronization of reticle stage and wafer stage is presented. In the controller, a master-slave structure is used, with the wafer stage acting as the master, and the reticle stage as the slave. Since the scanning process of scanner is repetitive, ILC is used to improve tracking performance. A simple design procedure is presented which allows design of the ILC system for the reticle stage and wafer stage independently. Finally, performance of the algorithm is illustrated by simulated on the virtual stages (the reticle stage and wafer stage). The results of simulation experiments and theory analyzing demonstrate that using the proposed controller better synchronization performance can be obtained for the reticle stage and wafer stage in scanner. Theory analysis and experiment shows the method is reasonable and efficient. © 2013 SPIE.
收录类别EI
学科主题Chaos theory - Controllers - Equipment - Experiments - Iterative methods - Optical instruments - Scanning - Synchronization
语种英语
ISSN号0277786X
内容类型会议论文
源URL[http://ir.ioe.ac.cn/handle/181551/7660]  
专题光电技术研究所_微电子装备总体研究室(四室)
作者单位1.Institute of Optics and Electronics, Chinese Academy of Sciences, Chengdu 610209, China
2.University of Chinese Academy of Sciences, Beijing 100039, China
推荐引用方式
GB/T 7714
Li, Lan-Lan,Hu, Song,Zhao, Li-Xin,et al. Iterative learning control for synchronization of reticle stage and wafer stage in step-and-scan lithographic equipment[C]. 见:Proceedings of SPIE: International Symposium on Photoelectronic Detection and Imaging 2013: Micro/Nano Optical Imaging Technologies and Applications. 2013.
个性服务
查看访问统计
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。


©版权所有 ©2017 CSpace - Powered by CSpace