Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings
Pei Weihua
刊名半导体学报
2005
卷号26期号:12页码:2275-2280
中文摘要a monolithic integrated cmos preamplifier is presented for neural recording applications. two ac-coupied capacitors are used to eliminate the large and random dc offsets existing in the electrode-electrolyte interface. diode-connected nmos transistors with a negative voltage between the gate and source are candidates for the large resistors necessary for the preamplifier. a novel analysis is given to determine the noise power spectral density. simulation results show that the two-stage cmos preamplifier in a closed-loop capacitive feedback configuration provides an ac in-band gain of 38.8db,a dc gain of 0,and an input-referred noise of 277nvmax, integrated from 0. 1hz to 1khz. the preamplifier can eliminate the dc offset voltage and has low input-referred noise by novel circuit configuration and theoretical analysis.
学科主题光电子学
收录类别CSCD
资助信息国家高技术研究发展计划,国家自然科学基金资助项目
语种英语
公开日期2010-11-23
内容类型期刊论文
源URL[http://ir.semi.ac.cn/handle/172111/16815]  
专题半导体研究所_中国科学院半导体研究所(2009年前)
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GB/T 7714
Pei Weihua. Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings[J]. 半导体学报,2005,26(12):2275-2280.
APA Pei Weihua.(2005).Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings.半导体学报,26(12),2275-2280.
MLA Pei Weihua."Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings".半导体学报 26.12(2005):2275-2280.
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