An effective solution of designing WIASoC with complex clock generation

CORC > 沈阳自动化研究所 > 中国科学院沈阳自动化研究所 > 工业控制网络与系统研究室

	An effective solution of designing WIASoC with complex clock generation
	Zhang ZP(张志鹏); Xie C(谢闯); Cui SP(崔书平)
	2014
会议名称	2014 International Conference on Industrial Electronics and Engineering (ICIEE 2014)
会议日期	May 1-2, 2014
会议地点	HongKong
关键词	clock generation C1ock skew system on chip design-f1ow
页码	113-119
中文摘要	This paper describes a methodology used for the implementation flow of a system on chip circuit containing a complex clock design. The clock generation module contained 2 clock sources and 11 generated clocks. Many of them have interactive relationship. and the 2 clock sources generate the internal clocks in various modes. It uses the combination of bottom-up strategy and top-down strategy to accomplish the clock generation module implementation first, and then finish the whole chip design. This methodology of the solution makes the whole structure of the design distinct, saves a lot of iterative time, and reduces chip power consumption.
产权排序	1
会议录	Industrial Electronics and Engineering
会议录出版者	WIT Press
语种	英语
内容类型	会议论文
源URL	[http://ir.sia.cn/handle/173321/17417]
专题	沈阳自动化研究所_工业控制网络与系统研究室
推荐引用方式 GB/T 7714	Zhang ZP,Xie C,Cui SP. An effective solution of designing WIASoC with complex clock generation[C]. 见:2014 International Conference on Industrial Electronics and Engineering (ICIEE 2014). HongKong. May 1-2, 2014.